View HD74ALVC162835_4312116.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

HD74ALVC162835
18-bit Universal Bus Driver with 3-state Outputs
REJ03D0055-0700Z (Previous ADE-205-201E (Z) ) Rev.7.00 Oct.02.2003
Description
The HD74ALVC162835 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V VCC operation. Data flow from A to Y is controlled by the output enable (OE). The device operates in the transparent mode when the latch enable (LE) is high. When LE is low, the A data is latched if the clock (CLK) input is held at a high or low logic level. If the LE is low, the A data is stored in the latch/flip flop on the low to high transition of CLK. When OE is high, the outputs are in the high impedance state. To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pullup register; the minimum value of the register is determined by the current sinking capability of the driver. All outputs, which are designed to sink up to 12 mA, include 26 resistors to reduce overshoot and undershoot.
Features
* * * * * * Meets "PC SDRAM registered DIMM design support document, Rev. 1.2" VCC = 2.3 V to 3.6 V Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25C) Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25C) High output current 12 mA (@VCC = 3.0 V) All outputs have equivalent 26 series resistors, so no external resistors are required
Rev.7.00, Oct.02.2003, page 1 of 15
HD74ALVCH162835
Function Table
Inputs OE H L L L L L H: L: X: Z: : Note: LE X H H L L L CLK X X X L or H A X L H L H X Z L H L H Y0 *1 Output Y
High level Low level Immaterial High impedance Low to high transition 1. Output level before the indicated steady-state input conditions were established.
Rev.7.00, Oct.02.2003, page 2 of 15
HD74ALVCH162835
Pin Arrangement
NC 1 NC 2 Y1 3 GND 4 Y2 5 Y3 6 VCC 7 Y4 8 Y5 9 Y6 10 GND 11 Y7 12 Y8 13 Y9 14 Y10 15 Y11 16 Y12 17 GND 18 Y13 19 Y14 20 Y15 21 VCC 22 Y16 23 Y17 24 GND 25 Y18 26 OE 27 LE 28 (Top view)
56 GND 55 NC 54 A1 53 GND 52 A2 51 A3 50 VCC 49 A4 48 A5 47 A6 46 GND 45 A7 44 A8 43 A9 42 A10 41 A11 40 A12 39 GND 38 A13 37 A14 36 A15 35 VCC 34 A16 33 A17 32 GND 31 A18 30 CLK 29 GND
Rev.7.00, Oct.02.2003, page 3 of 15
HD74ALVCH162835
Absolute Maximum Ratings
Item Supply voltage range Input voltage range *1 Output voltage range Input clamp current Output clamp current Continuous output current VCC, GND current / pin Maximum power dissipation at Ta = 55C (in still air) *3 Storage temperature range
*1, 2
Symbol VCC VI VO IIK IOK IO ICC or IGND PT Tstg
Ratings -0.5 to 4.6 -0.5 to 4.6 -0.5 to VCC+0.5 -50 50 50 100 1 -65 to 150
Unit V V V mA mA mA mA W C
Conditions
VI < 0 VO < 0 or VO > VCC VO = 0 to VCC TSSOP
Notes: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating condition" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp current ratings are observed. 2. The input and output positive-voltage ratings may be exceeded up to 4.6 V if the input and output clamp-current ratings are observed. 3. The maximum power dissipation is calculated using a junction temperature of 150C and board trace length of 750 mils.
Recommended Operating Conditions
Item Supply voltage Input voltage Output voltage High-level output current Symbol VCC VI VO IOH Min 2.3 0 0 -- -- -- Low-level output current IOL -- -- -- Input transition rise or fall rate Operating free-air temperature t/v Ta 0 -40 Max 3.6 VCC VCC -6 -8 -12 6 8 12 10 85 ns/V C mA Unit V V V mA VCC = 2.3 V VCC = 2.7 V VCC = 3.0 V VCC = 2.3 V VCC = 2.7 V VCC = 3.0 V Conditions
Note: Unused or floating control pins must be held high or low.
Rev.7.00, Oct.02.2003, page 4 of 15
HD74ALVCH162835
Logic Diagram
OE CLK LE A1
27 30 28 54
1D C1 CLK
3
Y1
To seventeen other channels
Rev.7.00, Oct.02.2003, page 5 of 15
HD74ALVCH162835
Electrical Characteristics
Ta = -40 to 85C Item Input voltage Symbol VCC (V) VIH VIL Output voltage VOH 2.3 to 2.7 2.7 to 3.6 2.3 to 2.7 2.7 to 3.6 2.3 to 3.6 2.3 2.3 3.0 2.7 3.0 VOL 2.3 to 3.6 2.3 2.3 3.0 2.7 3.0 Input current Off state output current IIN IOZ ICC 3.6 3.6 3.6 3.0 to 3.6 Min 1.7 2.0 -- -- 1.9 1.7 2.4 2.0 2.0 -- -- -- -- -- -- -- -- -- -- Max -- -- 0.7 0.8 V IOH = -100 A IOH = -4 mA, VIH = 1.7 V IOH = -6 mA, VIH = 1.7 V IOH = -6 mA, VIH = 2.0 V IOH = -8 mA, VIH = 2.0 V IOH = -12 mA, VIH = 2.0 V V IOL = 100 A IOL = 4 mA, VIL = 0.7 V IOL = 6 mA, VIL = 0.7 V IOL = 6 mA, VIL = 0.8 V IOL = 8 mA, VIL = 0.8 V IOL = 12 mA, VIL = 0.8 V A A A A VIN = VCC or GND VOUT = VCC or GND VIN = VCC or GND One input at (VCC-0.6)V, other inputs at VCC or GND -- -- -- -- -- 0.2 0.4 0.55 0.55 0.6 0.8 5.0 10 40 750 V Unit Test Conditions V
VCC-0.2 --
Quiescent supply current ICC
Rev.7.00, Oct.02.2003, page 6 of 15
HD74ALVCH162835
Switching Characteristics
(Ta = -40 to 85C)
Item Maximum clock frequency Symbol VCC (V) fmax 2.50.2 2.7 3.30.3 Propagation delay time tPLH tPHL 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 Output enable time tZH tZL Output disable time tHZ tLZ Input capacitance Output capacitance CIN CO 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 3.3 3.3 3.3 Min 150 150 150 1.0 -- 1.0 1.3 -- 1.3 1.4 -- 1.4 1.4 -- 1.1 1.0 -- 1.3 3.0 3.0 3.0 Typ -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 4.5 6.0 7.0 Max -- -- -- 5.0 5.0 4.2 5.9 5.8 5.1 6.3 6.1 5.4 6.3 6.5 5.5 4.7 4.9 4.5 7.0 9.0 9.0 pF pF Control inputs Data inputs Y ports ns OE Y ns OE Y CLK Y LE Y ns A Y Unit MHz From (Input) To (Output)
Rev.7.00, Oct.02.2003, page 7 of 15
HD74ALVCH162835
Switching Characteristics (cont.)
(Ta = -40 to 85C)
Item Setup time Symbol VCC (V) tsu 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 Hold time th 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 Pulse width tw 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 Min 2.2 2.1 1.7 1.9 1.6 1.5 1.3 1.1 1.0 0.6 0.6 0.7 1.4 1.7 1.4 3.3 3.3 3.3 3.3 3.3 3.3 Typ -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Max -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- CLK "H" or "L" ns LE "L" Data after LE CLK "H" or "L" ns Data after CLK Data before LE CLK "L" Data before LE CLK "H" Unit From (Input) ns Data before CLK
Rev.7.00, Oct.02.2003, page 8 of 15
HD74ALVCH162835
Switching Characteristics (cont.)
(Ta = 0 to 85C)
Item Propagation delay time
CL=0pF
*1
Symbol VCC (V)
Min
Typ -- -- -- -- -- --
Max 2.0 4.5 2.9 4.5 4.8 2.5
Unit ns
FROM (Input) A CLK CLK, A
TO (Output) Y Y Y Y
tPLH, tPHL 3.30.165 0.9 3.30.165 1.0 3.30.165 1.4 3.30.165 1.9 tSSO
*1 *1, 2
CL=50pF CL=0pF
*1
CL=50pF CL=50pF
3.30.165 1.9
Output rise / fall time
CL=50pF
tTLH, tTHL 3.30.165 1.0
volts/ ns
Notes: 1. This parameter is characterized but not tested. 2. tSSO : Simultaneous switching output time.
Operating Characteristics
(Ta = 25 C)
Item Symbol VCC = 2.50.2 V VCC = 3.30.3 V Unit Test Conditions Typ Power dissipation Outputs enable Cpd capacitance Outputs disable 22.0 5.0 Typ 24.5 6.0 pF CL = 0, f = 10 MHz
Rev.7.00, Oct.02.2003, page 9 of 15
HD74ALVCH162835 Test Circuit
See under table 500 S1 OPEN GND
*1 CL
500
Load Circuit for Outputs Symbol t PLH / t PHL t su / t h / t w t ZH/ t HZ t ZL / t LZ CL
Vcc=2.50.2V Vcc=2.7V, 3.30.3V
OPEN GND 2 x VCC 30 pF
OPEN GND 6.0 V 50 pF
Note:
1.
CL includes probe and jig capacitance.
Rev.7.00, Oct.02.2003, page 10 of 15
HD74ALVCH162835
Waveforms - 1
tr 90 % Input 10 % t PLH Vref 90 % Vref 10 % t PHL tf VIH GND
VOH Output Vref Vref VOL
Wave forms - 2
tr 90 % Timing Input 10 % tsu Vref th GND VIH Data Input Vref Vref GND tw VIH Input Vref Vref GND VIH
Rev.7.00, Oct.02.2003, page 11 of 15
HD74ALVCH162835 Wave forms - 3
tf Output Control 90 % Vref 10 % t ZL Vref t ZH Waveform - B Vref t HZ Vref2 10 % t LZ tr 90 % Vref GND VOH1 Waveform - A Vref1 VOL VOH VOL1 TEST VIH Vref Vref1 Vref2 VOH1 VOL1
Vcc=2.50.2V Vcc=2.7V, 3.30.3V
VIH
VCC
2.7 V
1/2 VCC 1.5 V VOL +0.15 V VOL +0.3 V VOH-0.15 V VOH-0.3 V VCC GND 3.0 V GND
Notes:
1.
2. 3. 4.
All input pulses are supplied by generators having the following characteristics : PRR 10 MHz, Zo = 50 , tr 2.0 ns, tf 2.0 ns. (VCC = 2.50.2 V) PRR 10 MHz, Zo = 50 , tr 2.5 ns, tf 2.5 ns. (VCC = 2.7 V, 3.30.3 V) Waveform - A is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform - B is for an output with internal conditions such that the output is high except when disabled by the output control. The output are measured one at a time with one transition per measurement.
Rev.7.00, Oct.02.2003, page 12 of 15
HD74ALVCH162835
IV Characteristics for Register Output (Measured value)
Weak condition HIGH Vcc = 3.15 V, Ta = 85 C VOH (V) 0.0 0 -10 -20 0.5 1.0 1.5 2.0 2.5 3.0 3.5
I OH (mA)
-30 -40 -50 -60 -70 -80
Strong condition HIGH Vcc = 3.45 V, Ta = 0 C VOH (V) 0.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
-20
I OH (mA)
-40
-60
-80
-100
Rev.7.00, Oct.02.2003, page 13 of 15
HD74ALVCH162835
Weak condition LOW Vcc = 3.15 V, Ta = 85 C 80 70 60
I OL (mA)
50 40 30 20 10 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
VOL (V)
Strong condition LOW Vcc = 3.45 V, Ta = 0 C 100
80
I OL (mA)
60
40
20
0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
VOL (V)
Rev.7.00, Oct.02.2003, page 14 of 15
HD74ALVCH162835
Package Dimensions
As of January, 2003
14.0 14.2 Max 56 29 6.10
Unit: mm
1 *0.19 0.05
0.50 0.08 M
28
1.0 8.10 0.20 0 - 8 *0.15 0.05 0.10 0.05 0.50 0.1
0.65 Max
1.20 Max
0.10
*Ni/Pd/Au plating
Package Code JEDEC JEITA Mass (reference value)
TTP-56DAV -- -- 0.23 g
Rev.7.00, Oct.02.2003, page 15 of 15
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
RENESAS SALES OFFICES
Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500 Fax: <1> (408) 382-7501 Renesas Technology Europe Limited. Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, United Kingdom Tel: <44> (1628) 585 100, Fax: <44> (1628) 585 900 Renesas Technology Europe GmbH Dornacher Str. 3, D-85622 Feldkirchen, Germany Tel: <49> (89) 380 70 0, Fax: <49> (89) 929 30 11 Renesas Technology Hong Kong Ltd. 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2375-6836 Renesas Technology Taiwan Co., Ltd. FL 10, #99, Fu-Hsing N. Rd., Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. 26/F., Ruijin Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1, Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001
http://www.renesas.com
(c) 2003. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon 1.0

▲Up To Search▲

Price & Availability of HD74ALVC162835

	To Download HD74ALVC162835 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .